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? semiconductor components industries, llc, 2012 february, 2012 ? rev. 2 1 publication order number: ncp4623/d ncp4623 150 ma, wide input voltage range, low dropout regulator the ncp4623 is a cmos linear voltage regulator designed for wide input voltage range. the maximum operating input voltage is up to 24 v with a minimum voltage starting from 2 v. the chip enable (ce) pin allows the device to lower standby current to 0.1 a typ. the ncp4623 features many protections for any current or thermal sensitive devices with current fold ? back protection, thermal shutdown protection, and peak and short current protection. this device is available in adjustable and fixed voltage output in 0.1 v steps. they are available in very thin xdfn6 1.6x1.6x0.4 mm in size and the very popular sot23 ? 5 and sot89 ? 5 packages. please contact your local sales office for additional output voltage options. features ? maximum operating input voltage: 24 v ? output voltage range: 2.5 v to 12.0 v (available in 0.1 v steps) 2.5 v to 24.0 v (adjustable version) ? output voltage accuracy: 2.0% ? supply current: 5 a ? stable with ceramic capacitors: 1 f or more ? current fold back protection ? peak and short current protection ? thermal shutdown protection ? available in xdfn6 1.6 x 1.6 mm, sot23 ? 5, sot89 ? 5 packages ? these are pb ? free devices typical applications ? battery ? powered equipment ? networking and communication equipment ? cameras, dvrs, stb and camcorders ? home appliances vin vout ce gnd c1 c2 100n 100n vin vout ncp4623x vin vout ce gnd c1 c2 100n 100n vin vout ncp4623xadj adj r1 r2 figure 1. typical application schematics http://onsemi.com see detailed ordering and shipping information in the package dimensions section on p age 17 of this data sheet. ordering information xdfn6 case 711ac xxx, xxxx = specific device code m, mm = date code a = assembly location y = year w = work week = pb ? free package marking diagrams (*note: microdot may be in either location) sot ? 89 5 case 528ab sot ? 23 ? 5 case 1212 xxx xmm 1 xxx xmm 1 xxxmm 1
ncp4623 http://onsemi.com 2 peak current protection vref vin gnd ce vout short protection ncp4623hxxxxx thermal protection peak current protection vref vin gnd ce vout short protection thermal protection adj ncp4623hxxadj figure 2. simplified schematic block diagram pin function description pin no. xdfn (note 1) pin no. sot89 ? 5 pin no. sot23 pin name description 3 1 1 v out output pin 6 2 2 gnd ground 4 3 5 ce chip enable pin (active ?h?) 1 5 3 v in input pin 5 4 4 nc/adj no connection (non adj versions) / reference voltage of adjustable output pin (adj versions) 2 ? ? nc no connection 1. tab is connected to gnd. tab should be connected to gnd, but leaving it unconnected is also acceptable
ncp4623 http://onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage (note 2) v in 26.0 v output voltage v out ? 0.3 to v in + 0.3 v chip enable input v ce ? 0.3 to v in + 0.3 v reference input voltage v adj ? 0.3 to v in + 0.3 v output current i out 250 ma power dissipation xdfn6 ? 1616 p d 640 mw power dissipation sot89 ? 5 900 power dissipation sot23 ? 5 420 junction temperature t j ? 40 to 150 c operation temperature t a ? 40 to 85 c storage temperature t stg ? 55 to 125 c esd capability, human body model (note 3) esd hbm 2000 v esd capability, machine model (note 3) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 2. refer to electrical characteristis and application information for safe operating area. 3. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating tested per jedec standard: jesd78. latchup current maximum rating tested per jedec standard: jesd78. thermal characteristics rating symbol value unit thermal characteristics, xdfn6 thermal resistance, junction ? to ? air r ja 156 c/w thermal characteristics, sot23 ? 5 thermal resistance, junction ? to ? air r ja 238 c/w thermal characteristics, sot89 ? 5 thermal resistance, junction ? to ? air r ja 111 c/w electrical characteristics ncp4623hxxxx, c in = c out = 0.1 f, t a = +25 c parameter test conditions symbol min typ max unit operating input voltage v in 2 24 v output voltage v in = v out(nom) + 2.0 v, i out = 20 ma v out x0.98 x1.02 v output voltage temp. coeffi- cient v in = v out(nom) + 2.0 v, i out = 20 ma, ? 40 c t a 105oc v out / t a 100 ppm/ c line regulation v out(nom) + 1 v v in 24 v, i out = 20 ma line reg 0.05 0.20 %/v load regulation v in = v out(nom) + 2.0 v, i out = 1 ma to 40 ma 2.5 v v out 3.0 v load reg 20 50 mv 3.1 v v out 5.0 v 30 75 5.1 v v out 12.0 v 40 115 dropout voltage i out = 20 ma 2.5 v v out 7.0 v v do 0.20 0.40 v 7.1 v v out 10.0 v 0.25 0.50 10.1 v v out 12.0 v 0.30 0.55 output current v in = v out(nom) + 2.0 v 2.5 v v out 2.9 v i out 140 ma 3.0 v v out 12.0 v 150
ncp4623 http://onsemi.com 4 electrical characteristics ncp4623hxxxx, c in = c out = 0.1 f, t a = +25 c parameter unit max typ min symbol test conditions short current limit v out = 0 v i sc 45 ma quiescent current v in = v out(nom) + 2.0 v, v ce = v in i q 5 10 a standby current v in = 24 v, v ce = 0 v i stb 0.1 1.0 a ce pin threshold voltage ce input voltage ?h? v ceh 2.1 v in v ce input voltage ?l? v cel 0 0.3 power supply rejection ratio v out = 3.3v v, v in = 5.3 v, v in = 0.2 v pk ? pk , i out = 30 ma, f = 1 khz psrr 35 db output noise voltage f = 10 hz to 100 khz, v out = 3.3 v, v in = 5.3 v, i out = 30 ma v n 90 v rms thermal shutdown temperature t sd 150 c thermal shutdown release temperature t sr 125 c electrical characteristics ncp4623hxxxadj, v adj = v out , c in = c out = 0.1 f, t a = +25 c parameter test conditions symbol min typ max unit operating input voltage v in 2 24 v output voltage v in = v out(nom) + 2.0 v, i out = 20 ma v out 2.45 2.50 2.55 v output voltage temp. coeffi- cient v in = v out(nom) + 2.0 v, i out = 20 ma, ? 40 c t a 105oc v out / t a 100 ppm/ c line regulation v out(nom) + 1 v v in 24 v, i out = 20 ma line reg 0.05 0.20 %/v load regulation v in = v out(nom) + 2.0 v, i out = 1 ma to 40 ma load reg 20 50 mv dropout voltage i out = 20 ma v do 0.20 0.40 v output current v in = v out(nom) + 2.0 v i out 140 ma short current limit v out = 0 v i sc 45 ma 3 quiescent current v in = v out(nom) + 2.0 v, v ce = v in i q 5 10 a standby current v in = 24 v, v ce = 0 v i stb 0.1 1.0 a ce pin threshold voltage ce input voltage ?h? v ceh 2.1 v in v ce input voltage ?l? v cel 0 0.3 power supply rejection ratio v in = 4.5 v, v out = 2.5 v, v in = 0.2 v pk ? pk , i out = 30 ma, f = 1 khz psrr 40 db output noise voltage f = 10 hz to 100 khz, v out = 2.5 v, v in = 4.5 v, i out = 30 ma v n 80 v rms thermal shutdown temperature t sd 150 c thermal shutdown release temperature t sr 125 c
ncp4623 http://onsemi.com 5 typical characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 50 100 150 200 250 300 figure 3. output voltage vs. output current 3.3 v version (t j = 25 c) v out , output voltage (v) i out , output current (ma) v in = 4.3 v 5.0 v 7.0 v 6.0 v figure 4. output voltage vs. output current 3.3 v version v in = 5.3 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 50 100 150 200 250 300 i out , output current (ma) v out , output voltage (v) t j = ? 40 c 25 c 105 c figure 5. output voltage vs. output current 5.0 v version (t j = 25 c) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0 50 100 150 200 250 300 v out , output voltage (v) i out , output current (ma) v in = 6.5 v 6.0 v 7.0 v 8.0 v 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0 50 100 150 200 250 300 figure 6. output voltage vs. output current 5.0 v version v in = 7.0 v t j = ? 40 c 25 c 105 c 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 0 50 100 150 200 250 300 i out , output current (ma) v out , output voltage (v) v out , output voltage (v) i out , output current (ma) figure 7. output voltage vs. output current 12.0 v version (t j = 25 c) v in = 13 v 13.5 v 14 v 15 v 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 0 50 100 150 200 250 300 t j = ? 40 c 25 c 105 c i out , output current (ma) v out , output voltage (v) figure 8. output voltage vs. output current 12.0 v version v in = 14.0 v
ncp4623 http://onsemi.com 6 typical characteristics 0.0 0.5 1.0 1.5 2.0 0 30 60 90 120 150 figure 9. dropout voltage vs. output current 3.3 v version t j = ? 40 c 25 c 105 c i out , output current (ma) v do , dropout voltage (v) figure 10. dropout voltage vs. output current 5.0 v version 0.0 0.5 1.0 1.5 2.0 0 30 60 90 120 150 i out , output current (ma) v do , dropout voltage (v) t j = ? 40 c 25 c 105 c 0.0 0.5 1.0 1.5 2.0 0 30 60 90 120 150 t j = ? 40 c 25 c 105 c figure 11. dropout voltage vs. output current 12.0 v version i out , output current (ma) v do , dropout voltage (v) 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 ? 40 ? 200 20406080100 figure 12. output voltage vs. temperature, 3.3 v version, v in = 5.3 v, i out = 20 ma t j , junction temperature ( c) v out , output voltage (v) 4.95 4.96 4.97 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 v out , output voltage (v) t j , junction temperature ( c) ? 40 ? 200 20406080100 figure 13. output voltage vs. temperature, 5.0 v version, v in = 7.0 v, i out = 20 ma 11.95 11.96 11.97 11.98 11.99 12.00 12.01 12.02 12.03 12.04 12.05 ? 40 ? 200 20406080100 t j , junction temperature ( c) v out , output voltage (v) figure 14. output voltage vs. temperature, 12.0 v version, v in = 14.0 v, i out = 20 ma
ncp4623 http://onsemi.com 7 typical characteristics 0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 figure 15. supply current vs. input voltage, 3.3 v version i gnd ( a) v in , input voltage (v) 0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 i gnd ( a) v in , input voltage (v) figure 16. supply current vs. input voltage, 5.0 v version figure 17. supply current vs. input voltage, 12.0 v version 0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 i gnd ( a) v in , input voltage (v) 0 1 2 3 4 5 6 7 8 ? 40 ? 200 20406080100 t j , junction temperature ( c) i gnd ( a) figure 18. supply current vs. temperature, 3.3 v version, v in = 5.3 v 0 1 2 3 4 5 6 7 8 t j , junction temperature ( c) ? 40 ? 200 20406080100 i gnd ( a) figure 19. supply current vs. temperature, 5.0 v version, v in = 7.0 v figure 20. supply current vs. temperature, 12.0 v version, v in = 14.0 v 0 1 2 3 4 5 6 7 8 ? 40 ? 200 20406080100 t j , junction temperature ( c) i gnd ( a)
ncp4623 http://onsemi.com 8 typical characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 i out = 40 ma 20 ma v out , output voltage (v) 1 ma v in , input voltage (v) figure 21. output voltage vs. input voltage, 3.3 v version 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0 5 10 15 20 25 v out , output voltage (v) v in , input voltage (v) i out = 40 ma 20 ma 1 ma figure 22. output voltage vs. input voltage, 5.0 v version 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 0 5 10 15 20 25 v out , output voltage (v) v in , input voltage (v) figure 23. output voltage vs. input voltage, 12.0 v version i out = 40 ma 20 ma 1 ma 0 10 20 30 40 50 60 70 0.1 1 10 100 1000 psrr (db) frequency (khz) i out = 1 ma 30 ma 150 ma figure 24. psrr, 3.3 v version, v in = 6.3 v 0 10 20 30 40 50 60 70 0.1 1 10 100 1000 v out , output voltage (v) v in , input voltage (v) figure 25. psrr, 5.0 v version, v in = 8.0 v i out = 1 ma 30 ma 150 ma 0 10 20 30 40 50 60 70 0.1 1 10 100 1000 figure 26. psrr, 12.0 v version, v in = 15.0 v psrr (db) frequency (khz) i out = 1 ma 30 ma 150 ma
ncp4623 http://onsemi.com 9 typical characteristics figure 27. output voltage noise, 3.3 v version, v in = 5.3 v, i out = 30 ma 0.01 0.1 1 10 100 1000 v n ( v rms / hz ) frequency (khz) figure 28. output voltage noise, 5.0 v version, v in = 7.0 v, i out = 30 ma 0 2.0 4.0 6.0 8.0 10 12 14 16 0.01 0.1 1 10 100 1000 v n ( v rms / hz ) frequency (khz) figure 29. output voltage noise, 12.0 v version, v in = 14.0 v, i out = 30 ma 0 5.0 10 15 20 25 30 35 40 45 0.01 0.1 1 10 100 1000 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 frequency (khz) v n ( v rms / hz ) figure 30. line transients, 2.5 v version, t r = t f = 5 s, i out = 30 ma 1.9 2.1 2.3 2.5 2.7 2.9 3.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 4.5 5.0 5.5 6.0 v out (v) t (ms) v in (v) figure 31. line transients, 3.3 v version, t r = t f = 5 s, i out = 30 ma 2.7 2.9 3.1 3.3 3.5 3.7 3.9 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 5.3 5.8 6.3 6.8 v out (v) t (ms) v in (v)
ncp4623 http://onsemi.com 10 typical characteristics figure 32. line transients, 5.0 v version, t r = t f = 5 s, i out = 30 ma 4.4 4.6 4.8 5.0 5.2 5.4 5.6 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 7.0 7.5 8.0 8.5 v out (v) t (ms) v in (v) figure 33. line transients, 12.0 v version, t r = t f = 5 s, i out = 30 ma 11.4 11.6 11.8 12.0 12.2 12.4 12.6 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 14.0 14.5 15.0 15.5 v out (v) t (ms) load transients, 2.5 v version, i out = 1 - 30 ma, t r = t f = 50 s, v in = 4.5 v 1.9 2.1 2.3 2.5 2.7 2.9 3.1 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 15 30 45 v in (v) v out (v) i out (ma) t (ms)
ncp4623 http://onsemi.com 11 typical characteristics figure 34 - load transients, 3.3 v version, i out = 1 - 30 ma, t r = t f = 50 s, v in = 5.3 v 2.7 2.9 3.1 3.3 3.5 3.7 3.9 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 15 30 45 v out (v) i out (ma) t (ms) figure 35. load transients, 5.0 v version, i out = 1 ? 30 ma, t r = t f = 50 s, v in = 7.0 v 4.4 4.6 4.8 5.0 5.2 5.4 5.6 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 15 30 45 v out (v) i out (ma) t (ms) figure 36. load transients, 12.0 v version, i out = 1 ? 30 ma, t r = t f = 50 s, v in = 14.0 v 11.4 11.6 11.8 12.0 12.2 12.4 12.6 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 15 30 45 v out (v) i out (ma) t (ms)
ncp4623 http://onsemi.com 12 typical characteristics figure 37. load transients, 2.5 v version, i out = 1 ? 100 ma, t r = t f = 50 s, v in = 4.5 v 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 50 100 150 v out (v) i out (ma) t (ms) figure 38. load transients, 3.3 v version, i out = 1 ? 100 ma, t r = t f = 50 s, v in = 5.3 v 1.8 2.3 2.8 3.3 3.8 4.3 4.8 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 50 100 150 v out (v) i out (ma) t (ms) figure 39. load transients, 5.0 v version, i out = 1 ? 100 ma, t r = t f = 50 s, v in = 7.0 v 3.5 4.0 4.5 5.0 5.5 6.0 6.5 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 50 100 150 v out (v) i out (ma) t (ms)
ncp4623 http://onsemi.com 13 typical characteristics figure 40. load transients, 12.0 v version, i out = 1 ? 100 ma, t r = t f = 50 s, v in = 14.0 v v out (v) i out (ma) t (ms) 10.5 11.0 11.5 12.0 12.5 13.0 13.5 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 50 100 150 figure 41. start ? up, 2.5 v version, v in = 4.5 v ? 0.5 0 0.5 1.0 1.5 2.0 2.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 2.25 4.50 6.75 v out (v) v ce (v) t ( s) i out = 150 ma i out = 1 ma i out = 30 ma chip enable figure 42. start ? up, 3.3 v version, v in = 5.3 v ? 1.0 0 1.0 2.0 3.0 4.0 0 2.65 5.30 7.95 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) v ce (v) t ( s) i out = 150 ma i out = 1 ma i out = 30 ma chip enable
ncp4623 http://onsemi.com 14 typical characteristics figure 43. start ? up, 5.0 v version, v in = 7.0 v ? 1.0 0 1.0 2.0 3.0 4.0 5.0 0 3.50 7.00 10.50 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) v ce (v) t ( s) i out = 150 ma i out = 1 ma i out = 30 ma chip enable figure 44. shutdown, 2.5 v version, v in = 4.5 v ? 0.5 0 0.5 1.0 1.5 2.0 2.5 0 2.25 4.50 6.75 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) v ce (v) t (ms) i out = 1 ma i out = 30 ma i out = 150 ma chip enable figure 45. start ? up, 12.0 v version, v in = 14.0 v ? 3.0 0 3.0 6.0 9.0 12.0 0 7 14 21 v out (v) v ce (v) t ( s) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 i out = 1 ma i out = 30 ma i out = 150 ma chip enable
ncp4623 http://onsemi.com 15 typical characteristics figure 46. shutdown, 3.3 v version, v in = 5.3 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) v ce (v) t (ms) i out = 1 ma i out = 30 ma i out = 150 ma chip enable ? 1.0 0 1.0 2.0 3.0 4.0 0 2.65 5.30 7.95 figure 47. shutdown, 5.0 v version, v in = 7.0 v ? 1.0 0 1.0 2.0 3.0 4.0 5.0 0 3.5 7.0 10.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) v ce (v) t (ms) i out = 150 ma i out = 30 ma i out = 1 ma chip enable figure 48. shutdown, 12.0 v version, v in = 14.0 v ? 3.0 0 3.0 6.0 9.0 12.0 0 7 14 21 i out = 1 ma i out = 30 ma i out = 150 ma chip enable v out (v) v ce (v) t (ms) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ncp4623 http://onsemi.com 16 application information a typical application circuits for ncp4623 series is shown in figure 49. vin vout ce gnd c1 c2 100n 100n vin vout ncp4623x vin vout ce gnd c1 c2 100n 100n vin vout ncp4623xadj adj r1 r2 figure 49. typical application schematics input decoupling capacitor (c1) a 0.1 f ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the ncp4623. higher values and lower esr improves line transient response. output decoupling capacitor (c2) recommended values of the ceramic output decoupling capacitor is in the range from 0.1 f to 2.2 f. stable operation of the regulator should be achieved within this range. if a tantalum capacitor is used, and its esr is high, loop oscillation may result. the capacitors should be connected as close as possible to the output and ground pins. larger values and lower esr improves dynamic parameters. output voltage setting (adj version) the output voltage of the adjustable regulator may be set for any output voltage from its voltage reference (2.5 v) up to v in voltage by an external voltage divider connected between vout and gnd pins with its center connected to the adj pin. the voltage divider is loaded by current into adj pin that is typically around 200 na. this current may cause an error in v out , therefore it is good to choose values of voltage divider low enough to achieve cross current around 2 a to eliminate error. output voltage can be computed from the equation: v out 2.5 1 r1 r2 r1 i adj (eq. 1) enable operation the enable pin ce may be used for turning the regulator on and off. the ic is switched on when a high level voltage is applied to the ce pin. do not leave the ce pin unconnected or between vceh and vcel voltage levels as this may leave the output voltage unstable or cause indefinite and unexpected currents flows internally. current limit this regulator includes a fold ? back type current limit circuit. this type of protection doesn?t limit output current up to specified current capability in normal operation, but when an over current occurs, output voltage and current decrease until the over current condition ends. typical characteristics of this protection type can be observed in the output voltage vs. output current graphs shown in the typical characteristics section of this datasheet. thermal as power across the ic increase, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature increase for the part. when the device has good thermal conductivity through t he pcb the junction temperature will be relatively low in high power dissipation applications. the ic includes internal thermal shutdown circuit that stops operation of regulator, if junction temperature is higher than 150 c. after that, when junction temperature decreases below 125 c, the operation of voltage regulator will resume. during high power dissipation condition, the regulator shuts down and resumes repeatedly protecting itself from overheating. pcb layout make the v in and gnd line as large as practical. if their impedance is high, noise pickup or unstable operation may result. connect capacitors c1 and c2 as close as possible to the ic, and make wiring as short as possible.
ncp4623 http://onsemi.com 17 ordering information device nominal output voltage description marking package shipping ? ncp4623hsnadjt1g adjustable enable high j24 sot23 ? 5 (pb ? free) 3000 / tape & reel NCP4623HSN050T1G 5.0 v enable high j50 sot23 ? 5 (pb ? free) 3000 / tape & reel ncp4623hsn100t1g 10.0 v enable high j00 sot23 ? 5 (pb ? free) 3000 / tape & reel ncp4623hsn120t1g 12.0 v enable high j20 sot23 ? 5 (pb ? free) 3000 / tape & reel ncp4623hmxadjtcg adjustable enable high bq24 xdfn1616 ? 6 (pb ? free) 5000 / tape & reel ncp4623hmx033tcg 3.3 v enable high bq33 xdfn1616 ? 6 (pb ? free) 5000 / tape & reel ncp4623hmx045tcg 4.5 v enable high bq45 xdfn1616 ? 6 (pb ? free) 5000 / tape & reel ncp4623hmx048tcg 4.8 v enable high bq48 xdfn1616 ? 6 (pb ? free) 5000 / tape & reel ncp4623hmx050tcg 5.0 v enable high bq50 xdfn1616 ? 6 (pb ? free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *to order other package and voltage variants, please contact your on semiconductor sales representative.
ncp4623 http://onsemi.com 18 package dimensions xdfn6 1.6x1.6, 0.5p case 711ac ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 6x e3 3x 2x 0.05 c pin one reference top view 2x 0.05 c note 3 a a1 0.05 c 0.05 c c seating plane side view l 2x 1 3 4 6 dim min max millimeters a ??? 0.40 a1 0.00 0.05 e3 0.15 ref b 0.15 0.25 d 1.60 bsc d2 1.25 1.35 e 1.60 bsc e2 0.65 0.75 e 0.50 bsc l 0.15 0.25 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* 1.70 0.77 0.50 0.38 6x 1.79 dimensions: millimeters 0.36 1 6x recommended l1 0.05 bsc l1 a m 0.05 b c a m 0.05 b c a m 0.05 b c pitch package outline
ncp4623 http://onsemi.com 19 package dimensions sot ? 89, 5 lead case 528ab ? 01 issue o mounting footprint* recommended c 0.10 top view side view bottom view c h 1 dim min max millimeters a 1.40 1.60 b1 0.37 0.57 b 0.32 0.52 c 0.30 0.50 d 4.40 4.60 d2 1.40 1.80 e 2.40 2.60 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. lead thickness includes lead finish. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. 5. dimensions l, l2, l3, l4, l5, and h are meas- ured at datum plane c. e 1.40 1.60 l 1.10 1.50 h 4.25 4.45 l2 0.80 1.20 l3 0.95 1.35 l4 0.65 1.05 l5 0.20 0.60 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. d e a c 23 54 l l5 e e b b1 l2 d2 l4 l3 2x 0.62 dimensions: millimeters 1 2x 1.50 1.30 2.79 0.45 1.50 1.65 4.65 4x 0.57 1.75 1
ncp4623 http://onsemi.com 20 package dimensions sot ? 23 5 ? lead case 1212 ? 01 issue a dim min max millimeters a1 0.00 0.10 a2 1.00 1.30 b 0.30 0.50 c 0.10 0.25 d 2.70 3.10 e 2.50 3.10 e1 1.50 1.80 e 0.95 bsc l l1 0.45 0.75 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. datum c is the seating plane. a 1 5 23 4 d e1 b l1 e e c m 0.10 c s b s a b 5x a2 a1 s 0.05 c l 0.20 --- *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.95 dimensions: millimeters pitch 5x 3.30 0.56 5x 0.85 a --- 1.45 recommended a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp4623/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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